DSFMT() | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inline |
DSFMT(unsigned int seed) | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inline |
genrand_close1_open2() | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inlinestatic |
genrand_close_open() | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inlinestatic |
genrand_open_close() | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inlinestatic |
genrand_open_open() | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inlinestatic |
genrand_uint32() | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inlinestatic |
get_state() const | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inline |
init_gen_rand(unsigned int seed) | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inline |
random_01() | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inline |
random_01_lclosed() | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inline |
random_01_rclosed() | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inline |
random_int() | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inline |
randomize() | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inline |
reset() | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inline |
reset(unsigned int seed) | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inline |
set_state(const ivec &state) | itpp::DSFMT< MEXP, POS1, SL1, MSK1, MSK2, MSK32_1, MSK32_2, MSK32_3, MSK32_4, FIX1, FIX2, PCV1, PCV2 > | inline |